BNL, Upton, Long Island, New York, USA
The RHIC LLRF platform is a flexible, modular system designed around a carrier board with six XMC daughter sites. The carrier board features a Xilinx FPGA with an embedded, hard core Power PC that is remotely reconfigurable. It serves as a front end computer (FEC) that interfaces with the RHIC control system. The carrier provides high speed serial data paths to each daughter site and between daughter sites as well as four generic external fiber optic links. It also distributes low noise clocks and serial data links to all daughter sites and monitors temperature, voltage and current. To date, two XMC cards have been designed: a four channel high speed ADC and a four channel high speed DAC.
BNL, Upton, Long Island, New York, USA
The RHIC LLRF upgrade is a flexible, modular system. Output signals are generated by a custom designed XMC card with 4 high speed digital to analog converters interfaced to a high performance field programmable gate array (FPGA). This paper discusses the hardware details of the XMC DAC board as well as the implementation of a low noise rf synthesizer with digital IQ modulation. This synthesizer also provides injection phase cogging and frequency hop rebucketing capabilities.
TRIUMF, Canada's National Laboratory for Particle and Nuclear Physics, Vancouver, Canada
CLASSE, Ithaca, New York, USA
TUL-DMCS, Łódź, Poland
The Advanced Telecommunications Computing Architecture (ATCA), MicroTCA (uTCA) and Advanced Mezzanine Card (AMC) standards, known as xTCA, provide unique features desired by various control systems of particle accelerators. The standards provide availability and operability as high as 99.999 %. A significant number of additional features must be implemented to take a full advantage of xTCA standards and gain the required availability. On the other hand, many control systems require various data acquisition and control modules with different number of input analogue and digital inputs or outputs as defined by their respective system specifications. The paper presents an universal base module, designed according to the AMC standard with an FPGA Mezzanine Card connector, that can be used for fast development of input-output subsystems. The module consists of two submodules. The digital part is designed according to the AMC standard while the main input-output functionality is realized by the FPGA Mezzanine Card part. The FMC submodule provides the functionality required by the specification of the LLRF system.
Warsaw University of Technology, Institute of Electronic Systems, Warsaw, Poland
TUL-DMCS, Łódź, Poland
DESY, Hamburg, Germany
BNL, Upton, Long Island, New York, USA
A digital low-level radio frequency (LLRF) field controller has been developed for the storage ring of The National Synchrotron Light Source-II (NSLS-II). The primary performance goal for the LLRF is to support the required RF operation of the superconducting cavities with a beam current of 500mA and a 0.14 degree or better RF phase stability. The digital field controller is FPGA-based, in a standard format 19”/1-U chassis. It has an option of high-level control support with MATLAB running on a local host computer through a USB2.0 port. The field controller has been field tested with the high-power superconducting RF (SRF) at Canadian light Source, and successfully stored a high beam current of 250 mA. The test results show that required specifications for the cavity RF field stability are met. This digital field controller is also currently being used as a development platform for other functional modules in the NSLS-II RF systems.
BNL, Upton, Long Island, New York, USA
A high performance FPGA based platform has been developed for the RHIC Low Level RF system upgrade, and is now replacing our aging VME based systems. This new platform employs a sophisticated embedded architecture to implement its core functionality. This architecture provides a control system interface, manages remote access to all configuration parameters and diagnostic data, supports communication between all system components, enables real time application specific processing, monitors system health, etc. This paper will describe the embedded architecture and its capabilities, with emphasis on its application at RHIC.
BNL, Upton, Long Island, New York, USA
As part of the overall development effort for the RHIC LLRF Upgrade Platform, a 4 channel ADC daughter module was developed to provide high speed, wide dynamic range digitizing and processing of signals from DC to several hundred megahertz. The first operational use of this card was to implement the bunch to bucket phase detector for the RHIC LLRF beam control feedback loops. This paper will describe the design and performance features of this daughter module as a bunch to bucket phase detector, and also provide an overview of its place within the overall LLRF platform architecture as a high performance digitizer and signal processing module suitable to a variety of applications.
BNL, Upton, Long Island, New York, USA
During RHIC Run 10, the first phase of the LLRF Upgrade was successfully completed. This involved replacing the aging VME based system with a modern digital system based on the recently developed RHIC LLRF Upgrade Platform, and commissioning the system as part of the normal RHIC start up process. At the start of Run 11, the second phase of the upgrade is underway, involving a significant expansion of both hardware and functionality. This paper will review the commissioning effort and provide examples of improvements in system performance, flexibility and scalability afforded by the new platform.
BNL, Upton, Long Island, New York, USA
The Electron Beam Ion Source (EBIS) LLRF system utilizes the RHIC LLRF upgrade platform to achieve the required functionality and flexibility. The LLRF system provides drive to the EBIS high-level RF system, employs IQ feedback to provide required amplitude and phase stability, and implements a cavity resonance control scheme. The embedded system provides the interface to the existing Controls System, making remote system control and diagnostic possible. The flexibility of the system allows us to reuse VHDL codes, develop new functionalities, improve current designs, and implement new features with relative ease. In this paper, we will discuss the commissioning process, issues encountered, and performance of the system.
ORNL, Oak Ridge, Tennessee, USA
ORNL RAD, Oak Ridge, Tennessee, USA
BNL, Upton, Long Island, New York, USA
The goal of the RHIC LLRF upgrade has been the development of a stand alone, generic, high performance, modular LLRF control platform, which can be configured to replace existing systems and to serve as a common platform for all new RF systems. The platform is also designed to integrate seamlessly into a distributed network based controls infrastructure, be easy to deploy, and to be useful in a variety of digital signal processing and data acquisition roles. Reuse of hardware, software and firmware has been emphasized to minimize development effort and maximize commonality of system components. System interconnection, synchronization and scaling is facilitated by a deterministic, high speed serial timing and data link, while standard intra and inter chassis communications utilize high speed, non-deterministic protocol based serial links. System hardware configuration is modular and flexible, based on a combination of a main carrier board which can host up to six custom or commercial daughter modules as required to implement desired functionality. This paper will provide an overview of the platform concept, architecture, features and benefits.
