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RIS citation export for MOPTY008: Preliminary Hardware Implementation of Compensation Mechanism of Superconducting Cavity Failure in C-ADS Linac

TY - CONF
AU - Xue, Z.
AU - Cheng, L.
AU - Dai, J.P.
AU - Yang, Y.
ED - Henderson, Stuart
ED - Akers, Evelyn
ED - Satogata, Todd
ED - Schaa, Volker R.W.
TI - Preliminary Hardware Implementation of Compensation Mechanism of Superconducting Cavity Failure in C-ADS Linac
J2 - Proc. of IPAC2015, Richmond, VA, USA, May 3-8, 2015
C1 - Richmond, VA, USA
T2 - International Particle Accelerator Conference
T3 - 6
LA - english
AB - For the proton linear accelerators used in applications such as ADS, due to the nature of the operation, it is essential to have beam failures at the rate several orders of magnitude lower than usual performance of similar accelerators. In order to achieve this extremely high performance reliability requirement, in addition to hardware improvement, a failure tolerant design is mandatory. A compensation mechanism to cope with hardware failure, mainly RF failures of superconducting cavities, will be in place in order to maintain the high uptime, short recovery time and extremely low frequency of beam loss. The hardware implementation of the mechanism poses high challenges due to the extremely tight timing constraints, high logic complexity, and mostly important, high flexibility and short turnaround time due to varying operation contexts. We will explore the hardware implementation of the scheme using fast electronic devices and Field Programmable Gate Array (FPGA). In order to achieve the goals of short recovery time and flexibility in compensation algorithms, an advanced hardware design methodology including high-level synthesis will be used.
PB - JACoW
CP - Geneva, Switzerland
SP - 953
EP - 955
KW - FPGA
KW - hardware
KW - linac
KW - cavity
KW - proton
DA - 2015/06
PY - 2015
SN - 978-3-95450-168-7
DO - 10.18429/JACoW-IPAC2015-MOPTY008
UR - http://jacow.org/ipac2015/papers/mopty008.pdf
ER -