Author: Pollock, K.M.
Paper Title Page
TUPRI085 Development of a 4 GS/s Intra-bunch Instability Control System for the SPS - Next Steps 1766
 
  • J.D. Fox, J.M. Cesaratto, J.E. Dusatko, K.M. Pollock, C.H. Rivetta, O. Turgut
    SLAC, Menlo Park, California, USA
  • S. De Santis
    LBNL, Berkeley, California, USA
  • W. Höfle, G. Kotzian, U. Wehrle
    CERN, Geneva, Switzerland
 
  Funding: Work supported by the U.S. Department of Energy under contract DE-AC02-76SF00515 and the US LHC Accelerator Research Program (LARP).
We present the expanded system architecture in development for the control of intra-bunch instabilities in the SPS. Earlier efforts concentrated on validating the performance of a single-bunch demonstration processor. This minimal system was successfully commissioned at the SPS just prior to the LS1 shutdown. The architecture is now in expansion for more complex functionality, specifically multi-bunch control, control during energy ramps, and the expansion of the system front-end dynamic range with more sophisticated orbit offset techniques. Two designs of wideband kicker are being developed for installation and evaluation with the beam. With these GHz bandwidth devices and new RF amplifiers we anticipate being able to excite and control internal motion of the beam consistent with modes expected for Ecloud and TMCI effects. We highlight the expanded features, and present strategies for verifying the behavior of the beam-feedback system in the next series of machine measurements planned after the LS1 shutdown.
 
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-TUPRI085  
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