IPAC2014 - List of Authors (Lesniak, T.P.)

Paper	Title	Page
WEPME069	Performance of a Compact LLRF System using Analog RF Backplane in MTCA.4 Crates	2438
	U. Mavrič, M. Fenner, M. Hoffmann, F. Ludwig, A.T. Rosner, H. Schlarb DESY, Hamburg, Germany K. Czuba, T.P. Leśniak Warsaw University of Technology, Institute of Electronic Systems, Warsaw, Poland A. Rohlev Elettra-Sincrotrone Trieste S.C.p.A., Basovizza, Italy
	In order to increase system compactness, mitigate cabling problems, increase rack space, minimize points of failure in the system and reduce digital distortion leakage into the sensitive analog signals, the concept of the RF backplane located in the rear section of the MTCA.4 crate has been introduced. Besides signal distribution, the concept includes a signal generation module and backplane management module. The generation and splitting of the analog signals is taking place in slots 15 and 14 on the rear side in theμLO generation module (uLOG). This module generates the local oscillator signal, the clocks and feeds through the master reference signal over the RF backplane to the slots. In this paper we present the recent results of such system.
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-WEPME069
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Paper

Title

Page

Performance of a Compact LLRF System using Analog RF Backplane in MTCA.4 Crates

2438

U. Mavrič, M. Fenner, M. Hoffmann, F. Ludwig, A.T. Rosner, H. Schlarb
DESY, Hamburg, Germany
K. Czuba, T.P. Leśniak
Warsaw University of Technology, Institute of Electronic Systems, Warsaw, Poland
A. Rohlev
Elettra-Sincrotrone Trieste S.C.p.A., Basovizza, Italy

In order to increase system compactness, mitigate cabling problems, increase rack space, minimize points of failure in the system and reduce digital distortion leakage into the sensitive analog signals, the concept of the RF backplane located in the rear section of the MTCA.4 crate has been introduced. Besides signal distribution, the concept includes a signal generation module and backplane management module. The generation and splitting of the analog signals is taking place in slots 15 and 14 on the rear side in theμLO generation module (uLOG). This module generates the local oscillator signal, the clocks and feeds through the master reference signal over the RF backplane to the slots. In this paper we present the recent results of such system.

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-WEPME069

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)