IPAC2014 - List of Authors (Crisp, J.L.)

Paper	Title	Page
THPME160	Design, Implementation and Preliminary Test Results of the ESS Beam Current Monitor System	3638
	H. Hassanzadegan, A. Jansson, C.A. Thomas ESS, Lund, Sweden J.L. Crisp FRIB, East Lansing, Michigan, USA U. Legat, K. Strniša Cosylab, Ljubljana, Slovenia M. Werner DESY, Hamburg, Germany
	The Beam Current Monitor system of the ESS linac will be mainly based on AC Current Transformers. The BCM system will be used to monitor the beam current and charge in absolute and differential modes. The differential current measurement is also intended for detecting large and sudden beam losses and acting on the Machine Interlock System (MIS), especially in areas where Beam Loss Monitors cannot be reliably used. A demo BCM based on a Bergoz ACCT and MTCA.4 electronics has been procured and integrated into EPICS. A VHDL code has been developed and successfully tested for the required FPGA signal processing including droop compensation, filtering, DC level correction and interfacing to the MIS. This paper gives an overview of the current status of the BCM system design and implementation as well as some preliminary test results in absolute and differential modes.
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-THPME160
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Paper

Title

Page

Design, Implementation and Preliminary Test Results of the ESS Beam Current Monitor System

3638

H. Hassanzadegan, A. Jansson, C.A. Thomas
ESS, Lund, Sweden
J.L. Crisp
FRIB, East Lansing, Michigan, USA
U. Legat, K. Strniša
Cosylab, Ljubljana, Slovenia
M. Werner
DESY, Hamburg, Germany

The Beam Current Monitor system of the ESS linac will be mainly based on AC Current Transformers. The BCM system will be used to monitor the beam current and charge in absolute and differential modes. The differential current measurement is also intended for detecting large and sudden beam losses and acting on the Machine Interlock System (MIS), especially in areas where Beam Loss Monitors cannot be reliably used. A demo BCM based on a Bergoz ACCT and MTCA.4 electronics has been procured and integrated into EPICS. A VHDL code has been developed and successfully tested for the required FPGA signal processing including droop compensation, filtering, DC level correction and interfacing to the MIS. This paper gives an overview of the current status of the BCM system design and implementation as well as some preliminary test results in absolute and differential modes.

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-THPME160

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)