IPAC2012 - List of Authors (Nonn, P.N.)

Paper	Title	Page
THPPC075	Development of a Digital Low-level RF Control System for the p-Linac Test Stand at FAIR	3461
	M. Konrad, U. Bonnes, C. Burandt, R. Eichhorn, J. Enders, P.N. Nonn, N. Pietralla TU Darmstadt, Darmstadt, Germany
	Funding: Work supported by DFG through CRC 634 and by the BMBF under 06 DA 9024 I A test stand for a proton Linac is currently built at GSI in the context of the FAIR project. Its low-level RF control system will be based on a system that has been developed for the S-DALINAC at TU Darmstadt operating at 3 GHz. This system converts the RF signal coming from the cavity down to the base band using a hardware I/Q demodulator. The base-band signals are digitized by ADCs and fed into an FPGA. A custom CPU implemented in the FPGA executes the control algorithm. The resulting signals are I/Q modulated before they are sent back to the cavity. The RF module has to be adapted to the p-LINAC's operating frequency of 325 MHz. Moreover, the p-LINAC will run in pulsed operation whereas the S-DALINAC is operated in CW mode. Different quality factors of the cavities and the pulsed operation require a redesign of the control algorithm. We will report on the modifications necessary to adapt the S-DALINAC's control system to the p-LINAC test stand and on first results obtained from tests with a prototype.

Paper

Title

Page

Development of a Digital Low-level RF Control System for the p-Linac Test Stand at FAIR

3461

M. Konrad, U. Bonnes, C. Burandt, R. Eichhorn, J. Enders, P.N. Nonn, N. Pietralla
TU Darmstadt, Darmstadt, Germany

Funding: Work supported by DFG through CRC 634 and by the BMBF under 06 DA 9024 I
A test stand for a proton Linac is currently built at GSI in the context of the FAIR project. Its low-level RF control system will be based on a system that has been developed for the S-DALINAC at TU Darmstadt operating at 3 GHz. This system converts the RF signal coming from the cavity down to the base band using a hardware I/Q demodulator. The base-band signals are digitized by ADCs and fed into an FPGA. A custom CPU implemented in the FPGA executes the control algorithm. The resulting signals are I/Q modulated before they are sent back to the cavity. The RF module has to be adapted to the p-LINAC's operating frequency of 325 MHz. Moreover, the p-LINAC will run in pulsed operation whereas the S-DALINAC is operated in CW mode. Different quality factors of the cavities and the pulsed operation require a redesign of the control algorithm. We will report on the modifications necessary to adapt the S-DALINAC's control system to the p-LINAC test stand and on first results obtained from tests with a prototype.