Author: Cabala, J.
Paper Title Page
THPHA041 Information System for ALICE Experiment Data Access 1451
 
  • J. Jadlovsky, J. Cabala, J. Cerkala, E. Hanc, A. Jadlovska, S. Jadlovska, M. Kopcik, M. Oravec, M. Tkacik, D. Voscek
    Technical University of Kosice, Kosice, Slovak Republic
  • P.M. Bond, P.Ch. Chochula
    CERN, Geneva, Switzerland
 
  The main goal of this paper is the presentation of Dcs ARchive MAnager for ALICE Experiment detector conditions data (DARMA), which is the updated version of the AMANDA 3 software currently used within ALICE experiment at CERN. The typical user of this system is either a physicist who performs further analysis on data acquired during the operation of the ALICE detector or an engineer, who analyzes the detector status between iterations of experiments. Based on the experience with the current system, the updated version aims to simplify the overall complexity of the previous version, which leads to simpler implementation, administration and portability of the system without sacrificing the functionality. DARMA is realized as an ASP. NET web page based on Model-View-Controller architecture and this paper provides a closer look at the design phase of the new backend structure in comparison to previous solution as well as the description of individual modules of the system.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THPHA041  
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THPHA076 A Novel General Purpose Data Acquisition Board with a DIM Interface 1565
 
  • J. Jadlovsky, J. Cabala, A. Jadlovska, S. Jadlovska, M. Kopcik, M. Oravec, M. Tkacik, D. Voscek
    Technical University of Kosice, Kosice, Slovak Republic
  • P.Ch. Chochula, O. Pinazza
    CERN, Geneva, Switzerland
 
  A new general purpose data acquisition and control board (Board51) is presented in this paper. Board51 has primarily been developed for use in the ALICE experiment at CERN, but its open design allows for a wide use in any application requiring flexible and affordable data acquisition system. It provides analog I/O functionalities and is equipped with software bundle, allowing for easy integration into the SCADA. Based on the Silicon Labs C8051F350 MCU, the board features a fully-differential 24-bit ADC that provides an ability to perform very precise DAQ at sampling rate up to 1kHz. For analog outputs two 8-bit current-mode DACs can be used. Board51 is equipped with UART to USB interface that allows communication with any computer platform. As a result the board can be controlled through the DIM system. This is provided by a program running on a computer publishing services that include measured analog values of each ADC channel and accepts commands for setting ADC readout rate and DACs voltage. Digital inputs/outputs are also accessible using the DIM communication system. These services enable any computer on a common network to read measured values and control the board.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THPHA076  
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THPHA208 Communication Architecture of the Detector Control System for the Inner Tracking System 1930
 
  • J. Jadlovsky, J. Cabala, A. Jadlovska, S. Jadlovska, M. Kopcik, M. Oravec, M. Tkacik, D. Voscek
    Technical University of Kosice, Kosice, Slovak Republic
  • P.Ch. Chochula, O. Pinazza
    CERN, Geneva, Switzerland
 
  This paper presents the proposed communication architecture of the Detector Control System (DCS) for the Inner Tracking System (ITS). The purpose of the DCS is to acquire and control the states of the ITS. Since the ITS is not yet fully implemented, an emulator of the communication architecture is being developed. The proposed architecture comprises five levels. At the bottom, the detector is emulated by sensors connected to microcontrollers. Each microcontroller is then connected to a Raspberry Pi which represents the ALICE low-level front-end (ALF) electronics at the second level of communication architecture. The third level is represented by Front-End Device (FRED), a Linux server where more than one ALF device can be connected. FRED is then connected to the fourth level, implemented by the SCADA interface - WinCC OA. Above all these levels is an archiving and configuration database setup. Configuration bypasses the SCADA interface and is managed directly through FRED. The purpose of the emulator is to verify the proposed architecture in terms of data throughput and cooperation of the mentioned modules.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THPHA208  
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