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TY - CONF AU - Rujanakraikarn, R. ED - Schaa, Volker RW ED - Costa, Isidre ED - Fernández, David ED - Matilla, Ãscar TI - FPGA-Based Pulsed-RF Phase and Amplitude Detector at SLRI J2 - Proc. of ICALEPCS2017, Barcelona, Spain, 8-13 October 2017 C1 - Barcelona, Spain T2 - International Conference on Accelerator and Large Experimental Control Systems T3 - 16 LA - english AB - In this paper, the prototype of phase and amplitude detector for pulsed-RF measurement is described. The hardware is designed in VHDL and implemented using Field Programmable Gate Array (FPGA) for digital processing. The main phase and amplitude detection algorithm is implemented using state machine in the MicroBlaze soft processor. The detector system is designed to measure the phase and amplitude of a 5-microsecond wide 2,856 MHz pulsed-RF at a repetition rate of 0.5 Hz. The front-end hardware for the pulsed-RF signal acquisition is also described with the interface to the FPGA-based controller part. Initial test results of the prototype are presented. PB - JACoW CP - Geneva, Switzerland SP - 557 EP - 561 KW - ion KW - detector KW - interface KW - controls KW - FPGA DA - 2018/01 PY - 2018 SN - 978-3-95450-193-9 DO - 10.18429/JACoW-ICALEPCS2017-TUPHA068 UR - http://jacow.org/icalepcs2017/papers/tupha068.pdf ER -