Author: Van Trappen, P.
Paper Title Page
MOPGF121 Stripping Foil Displacement Unit Control for H Injection in PSB at CERN 363
 
  • P. Van Trappen, R. Noulibos, W.J.M. Weterings
    CERN, Geneva, Switzerland
 
  For CERN's Linac4 (L4) Proton Synchrotron Booster (PSB) injection scheme, slices of the 160 MeV H beam will be distributed to the 4 superposed synchrotron rings of the PSB. The beam will then be injected horizontally into the PSB by means of an H charge-exchange injection system using a graphite stripping foil to strip the electrons from the H ions. The foil and its positioning mechanism will be housed under vacuum inside a stripping foil unit, containing a set of six foils that can be mechanically rotated into the beam aperture. The band with mounted foils is controlled by a stepping motor while a resolver, micro-switches and a membrane potentiometer provide foil position feedback. The vicinity of the ionizing beam and vacuum requirements have constrained the selection of the above mentioned control system parts. The positioning and interlocking logic is implemented in an industrial Programmable Logic Controller (PLC). This paper describes the design of the stripping foil unit electronics and controls and presents the first results obtained from a test bench unit which will be installed in the Linac4 transfer line by the end of the 2015 for foil tests with beam.  
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MOPGF122 A Fast Interlock Detection System for High-Power Switch Protection 367
 
  • P. Van Trappen, E. Carlier, S. Uyttenhove
    CERN, Geneva, Switzerland
 
  Fast pulsed kicker magnet systems are powered by high-voltage and high-current pulse generators with adjustable pulse length and amplitude. To deliver this power, fast high-voltage switches such as thyratrons and GTOs are used to control the fast discharge of pre-stored energy. To protect the machine and the generator itself against internal failures of these switches several types of fast interlocks systems are used at TE-ABT (CERN Technology department, Accelerator Beam Transfer). To get rid of this heterogeneous situation, a modular digital Fast Interlock Detection System (FIDS) has been developed in order to replace the existing fast interlocks systems. In addition to the existing functionality, the FIDS system will offer new functionalities such as extended flexibility, improved modularity, increased surveillance and diagnostics, contemporary communication protocols and automated card parametrization. A Xilinx Zynq®-7000 SoC has been selected for implementation of the required functionalities so that the FPGA (Field Programmable Gate Array) can hold the fast detection and interlocking logic while the ARM® processors allow for a flexible integration in CERN's Front-End Software Architecture (FESA) framework, advanced diagnostics and automated self-parametrization.  
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