Paper | Title | Page |
---|---|---|
THPML066 | Filling Pattern Measurement System Upgrade in SSRF* | 4791 |
|
||
Funding: Work supported by National Natural Science Foundation of China (No.11575282 No.11375255 No.11305253) Filling pattern affects various operation performance of a synchrotron light source. A new diagnostic beam charge monitor (BCM) with high bandwidth multi-channels digitizer was developed to perform bunch-by-bunch charge measurement and record filling pattern for SSRF storage ring. Signals picked up from button elec-trodes were sampled synchronously with RF frequency, and IQ (In-phase and Quadrature phase) sampling meth-od was employed for noise-filtering and phase independ-ence calibration. Layout and evaluation experiment of the system are presented in this paper. |
||
DOI • | reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2018-THPML066 | |
Export • | reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml) | |
THPML067 | SXFEL Linac BPM System Development and Performance Evaluation | 4794 |
SUSPF094 | use link to see paper's listing under its alternate paper code | |
|
||
Shanghai Soft X-ray Free Electron Laser (SXFEL) is a test facility to study key technologies and new FEL physics. In order to deliver high quality electron beams to the undulator section, a high resolution (better than 10 microns with 200pC beam) Linac beam position monitor system has been developed. The system consists of stripline pickup and custom designed DBPM processor. The hardware and software architecture will be introduced in this paper. The online performance evaluation results will be presented as well. | ||
DOI • | reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2018-THPML067 | |
Export • | reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml) | |
THPML071 | Upgrade of Digital BPM Processor at DCLS and SXFEL | 4807 |
|
||
A digital BPM processor has been developed at 2016 in SINAP for DCLS and SXFEL, which are FEL facilities built in China. The stripline BPM and cavity BPM processors share the same hardware platform and firmware, but the processing algorithms implemented in EPICS IOC on the ARM CPU are different. The capability of the ARM limits the processing speed to 10 bunches per second. Now the bunch rate of DCLS and SXFEL are going to increase from 10Hz to 50Hz. To meet the higher processing speed requirements, the processor firmware and software are upgraded in 2017. All BPM signal processing algorithms are implemented in FPGA, and EPICS IOC reads results only. After the upgrade, the processing speed reach 120 bunches per second. And this is also a good preparation for future Shanghai Hard-X ray FEL, which bunch rate is about 1MHz. | ||
DOI • | reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2018-THPML071 | |
Export • | reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml) | |