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https://doi.org/10.18429/JACoW-IPAC2017-MOPAB096
Title Universal Digital Aggregator for in-Line Signal Processing
Authors
  • M.P. Kopeć, Ł.J. Dudek, A. Kisiel, M.A. Knafelpresenter, A.I. Wawrzyniak, M. Zając
    Solaris National Synchrotron Radiation Centre, Jagiellonian University, Kraków, Poland
Abstract Universal digital aggregator is a device for general signal processing with around 100kHz bandwidth. It contains of 4 inputs and 4 open-drain outputs - all of which are fully programmable. When the number of controlling digital signals exceeds the number of input ports of a device there is a need to either multiplex those signals or process them before the target device. The aggregator can be powered from the target device so no additional cabling is needed, especially considering its low power consumption. This straightforward, complex and portable device can be easily applied where PLC solutions are difficult to implement.
Paper download MOPAB096.PDF [0.398 MB / 3 pages]
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Conference IPAC2017, Copenhagen, Denmark
Series International Particle Accelerator Conference (8th)
Proceedings Link to full IPAC2017 Proccedings
Session Posters Monday 1
Date 15-May-17   16:00–18:00
Main Classification 06 Beam Instrumentation, Controls, Feedback and Operational Aspects
Sub Classification T03 Beam Diagnostics and Instrumentation
Keywords hardware, software, target, operation, PLC
Publisher JACoW, Geneva, Switzerland
Editors Volker RW Schaa (GSI, Darmstadt, Germany); Gianluigi Arduini (CERN, Geneva, Switzerland); Juliana Pranke (ESS, Lund, Sweden); Mike Seidel (PSI, Villigen, Switzerland); Mats Lindroos (ESS, Lund, Sweden)
ISBN 978-3-95450-182-3
Published May 2017
Copyright
Copyright © 2017 by JACoW, Geneva, Switzerland     CC-BY Creative Commons License
cc Creative Commons Attribution 3.0