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BiBTeX citation export for MOPHA165: An Embedded IOC for 100 MeV Cyclotron RF Control

@InProceedings{yin:icalepcs2019-mopha165,
  author       = {Z.G. Yin and X.L. Fu and X.T. Lu and X.E. Mu and T.J. Zhang},
  title        = {{An Embedded IOC for 100 MeV Cyclotron RF Control}},
  booktitle    = {Proc. ICALEPCS'19},
  pages        = {625--628},
  paper        = {MOPHA165},
  language     = {english},
  keywords     = {EPICS, controls, embedded, cyclotron, hardware},
  venue        = {New York, NY, USA},
  series       = {International Conference on Accelerator and Large Experimental Physics Control Systems},
  number       = {17},
  publisher    = {JACoW Publishing, Geneva, Switzerland},
  month        = {08},
  year         = {2020},
  issn         = {2226-0358},
  isbn         = {978-3-95450-209-7},
  doi          = {10.18429/JACoW-ICALEPCS2019-MOPHA165},
  url          = {https://jacow.org/icalepcs2019/papers/mopha165.pdf},
  note         = {https://doi.org/10.18429/JACoW-ICALEPCS2019-MOPHA165},
  abstract     = {An ARM9 based embedded controller for 100 MeV cyclotron RF control has been successfully developed and tested with EPICS control software. The controller is implemented as a 3U VME long card, located in the first slot of the LLRF control crate, as a supervise module that continuously monitors the status of the RF system through a costume designed backplane and related ADCs located on other boards in the crate. For high components density and signal integrate considerations, the PCB layout adopts a 6-layer design. The Debian GNU/Linux distribution for the ARM architecture has been selected as operating system for both robustness and convenience. EPICS device support as well as Linux driver routings has been written and tested to interface database records to the on board 12 multichannel 16-bit ADCs and DACs. In the meantime, a chip selecting encoding-decoding strategy has been implemented from both software and hardware aspects to extend the SPI bus of the AT91SAM9g20 processor. The detailed software as well as hardware designed will be reported in this paper.},
}