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TY - CONF AU - Van Trappen, P. AU - Carlier, E. AU - Gauthier, M. AU - Magnin, N. AU - Oltedal, E.J. AU - Schipper, J. ED - White, Karen S. ED - Brown, Kevin A. ED - Dyer, Philip S. ED - Schaa, Volker RW TI - SoC Technology for Embedded Control and Interlocking Within Fast Pulsed Systems at CERN J2 - Proc. of ICALEPCS2019, New York, NY, USA, 05-11 October 2019 CY - New York, NY, USA T2 - International Conference on Accelerator and Large Experimental Physics Control Systems T3 - 17 LA - english AB - The control of pulsed systems at CERN requires often the use of fast digital electronics to perform tight timing control and fast protection of high-voltage pulsed generators. For the implementation of such functionalities, a FPGA is the perfect candidate for the digital logic, however with limited integration potential within the control system. The market push for integrated devices, so called System on a Chip (SoC) - a tightly coupled ARM processing system and specific programmable logic in a single device, has allowed a better integration of the various components required for the control of pulsed systems. This technology is used for the implementation of fast switch interlocking logic, integrated within the CERN control framework by using embedded Linux running a Snap7 server. It is also used for the implementation of a lower-tier communication bridge between a front-end computer and a high fan-out multiplexing programmable logic for timing and analogue low-level control. This paper presents these two projects where the SoC technology has been deployed and discusses possible further applications within distributed real-time control architecture for distributed pulsed systems. PB - JACoW Publishing CP - Geneva, Switzerland SP - 592 EP - 596 KW - controls KW - software KW - hardware KW - FPGA KW - real-time DA - 2020/08 PY - 2020 SN - 2226-0358 SN - 978-3-95450-209-7 DO - doi:10.18429/JACoW-ICALEPCS2019-MOPHA153 UR - https://jacow.org/icalepcs2019/papers/mopha153.pdf ER -