IBIC2020 - List of Authors (Leitao, P.V.)

Paper	Title	Page
THPP04	Testbed Development for the Characterisation of an ASIC for Beam Loss Measurement Systems	215
	F. Martina, L. Giangrande, J. Kaplon, P.V. Leitao, C. Zamantzas CERN, Geneva, Switzerland F. Martina The University of Liverpool, Liverpool, United Kingdom
	A high-performance, radiation-hardened, application-specific integrated circuit (ASIC) is under development at CERN for digitising signals from beam losses monitoring systems in harsh radiation environments. To fully characterise and validate both the analogue and digital parts of these ASICs, an automated testbed has been developed. Here we report on the components used to build this setup, its capabilities as well as the methodology of the data analysis. Focus is given to the data collection, the automation and the efficient computation methods developed to extract the merit factors of two different ASIC designs from prototype manufacturing runs.
	Poster THPP04 [4.534 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-IBIC2020-THPP04
About •	paper received ※ 11 September 2020 paper accepted ※ 17 September 2020 issue date ※ 30 October 2020
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

Paper

Title

Page

Testbed Development for the Characterisation of an ASIC for Beam Loss Measurement Systems

215

F. Martina, L. Giangrande, J. Kaplon, P.V. Leitao, C. Zamantzas
CERN, Geneva, Switzerland
F. Martina
The University of Liverpool, Liverpool, United Kingdom

A high-performance, radiation-hardened, application-specific integrated circuit (ASIC) is under development at CERN for digitising signals from beam losses monitoring systems in harsh radiation environments. To fully characterise and validate both the analogue and digital parts of these ASICs, an automated testbed has been developed. Here we report on the components used to build this setup, its capabilities as well as the methodology of the data analysis. Focus is given to the data collection, the automation and the efficient computation methods developed to extract the merit factors of two different ASIC designs from prototype manufacturing runs.

Poster THPP04 [4.534 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-IBIC2020-THPP04

About •

paper received ※ 11 September 2020 paper accepted ※ 17 September 2020 issue date ※ 30 October 2020

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)