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Title Commissioning and Validation of the ATLAS Level-1 Topological Trigger
  • A.T. Aukerman, T.M. Hong
    University of Pittsburgh, Pittsburgh, Pennsylvania, USA
Abstract The ATLAS experiment has recently commissioned a new hardware component of its first-level trigger: the topological processor (L1Topo). This innovative system, using state-of-the-art FPGA processors, selects events by applying kinematic and topological requirements on candidate objects (energy clusters, jets, and muons) measured by calorimeters and muon sub-detectors. Since the first-level trigger is a synchronous pipelined system, such requirements are applied within a latency of 200ns. We will present the first results from data recorded using the L1Topo trigger; these demonstrate a significantly improved background event rejection, thus allowing for a rate reduction without efficiency loss. This improvement has been shown for several physics processes leading to low-pT leptons, including H->tau tau and J/Psi->mu mu. In addition, we will discuss the use of an accurate L1Topo simulation as a powerful tool to validate and optimize the performance of this new trigger system. To reach the required accuracy, the simulation must take into account the limited precision that can be achieved with kinematic calculations implemented in firmware.
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Conference ICALEPCS2017, Barcelona, Spain
Series International Conference on Accelerator and Large Experimental Control Systems (16th)
Proceedings Link to full ICALEPCS2017 Proccedings
Session Poster Session
Date 10-Oct-17   16:45–19:00
Main Classification Hardware Technology
Keywords ion, hardware, luminosity, MMI, experiment
Publisher JACoW, Geneva, Switzerland
Editors Volker RW Schaa (GSI, Darmstadt, Germany); Isidre Costa (ALBA-CELLS, Cerdanyola del Vallès, Spain); David Fernández (ALBA-CELLS, Cerdanyola del Vallès, Spain); Óscar Matilla (ALBA-CELLS, Cerdanyola del Vallès, Spain)
ISBN 978-3-95450-193-9
Published January 2018
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