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Title Plans at CERN for Electronics and Communication in the Distributed I/O Tier
  • G. Daniluk, E. Gousiou
    CERN, Geneva, Switzerland
Abstract Controls and data acquisition in accelerators often involve some kind of computing platform (VME, PICMG 1.3, MTCA.4…) connected to Distributed I/O Tier electronics using a fieldbus or another kind of serial link. At CERN, we have started a project to rationalize this tier, providing a modular centrally-supported platform which allows equipment groups to focus on solving their particular problems while benefiting from a set of well-debugged building blocks. The paper describes the strategy, based on 3U Euro crates with a generic FPGA-based board featuring space for FMC mezzanines. Different mezzanines allow communication using different protocols. There are two variants of the electronics, to deploy in environments with and without radiation tolerance requirements. The plans we present are the result of extensive discussion at CERN among all stakeholders. We present them here with the aim of gathering further feedback and potential interest for inter-lab collaborations.
Paper download THPHA071.PDF [1.044 MB / 5 pages]
Poster download THPHA071_POSTER.PDF [3.171 MB]
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Conference ICALEPCS2017, Barcelona, Spain
Series International Conference on Accelerator and Large Experimental Control Systems (16th)
Proceedings Link to full ICALEPCS2017 Proccedings
Session Poster Session
Date 12-Oct-17   16:45–19:00
Main Classification Hardware Technology
Keywords ion, radiation, FPGA, electron, electronics
Publisher JACoW, Geneva, Switzerland
Editors Volker RW Schaa (GSI, Darmstadt, Germany); Isidre Costa (ALBA-CELLS, Cerdanyola del Vallès, Spain); David Fernández (ALBA-CELLS, Cerdanyola del Vallès, Spain); Óscar Matilla (ALBA-CELLS, Cerdanyola del Vallès, Spain)
ISBN 978-3-95450-193-9
Published January 2018
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